Parallel and Sequential Algorithms for the Optimization and Design of Fault-Tolerant Nanoscale Semiconductor Devices

A robust and computationally efficient technique is developed for the design of fluctuation resistant structures (fault-tolerant) semiconductor devices. This technique can be applied to the computation of the doping profiles that minimize the intrinsic variations of various parameters induced by random dopant fluctuations. The technique is based on the evaluation of doping sensitivity functions, which are defined as functionals on the adjoint space of the space of square integrable functions generated by all possible doping variations. The optimized doping profiles are computed by minimizing the standard deviation of fluctuations of different parameters, in which constraints are taken into consideration by using the Lagrange multipliers technique. The presented technique can be applied to any semiconductor device in general, such as metal-oxide-semiconductor field-effect-transistors (MOSFETs), silicon-on-insulator (SOI) devices, Fin field-effect-transistors (FinFETs), etc. and can be used in the framework of any transport model. We present the results for the minimization of the random dopant-induced fluctuations of threshold voltages in 25 nm, 30 nm, and 35 nm channel-length MOSFETs and double-gate fully-depleted SOI devices. It is shown that by carefully designing the doping profiles, the random dopant-induced fluctuations can be suppressed between 20% and 50% in devices with channel-lengths of approximately 30 nm and more than one order of magnitude in long-channel devices. Analytical equations are derived for the optimum doping profiles that minimize the random dopant-induced fluctuations of the threshold voltage in long-channel MOSFETs. It is shown that, in both long-channel and short-channel devices, the size of the undoped region should be at least ¼ of the width of the depletion region in order to suppress efficiently the effect of random dopant-induced fluctuations on threshold voltage. In the final part of the dissertation the random dopant-induced fluctuations of static noise margins (SNM) in 6-T static random access memory (SRAM) cells by using the formalism of doping sensitivity functions, developed in the first part. In the case of static random access memory (SRAM) cell the doping sensitivity functions show how sensitive the SNM are to variations of the doping concentration at different locations inside the cell. The technique presented is based on a full circuit perturbation theory at the level of each device transport model. It provides important information for the design and optimization of SNM and can capture correlation effects of doping fluctuations inside the same semiconductor device and between more devices. The bias points and the magnitude of random dopant-induced fluctuations are computed by solving the Poisson, current continuity, and Density-Gradient equations for all the devices self-consistently. Simulation results for a well-scaled SRAM cell 30 nm channel-length transistors show that the most sensitive regions to doping fluctuations extend for approximately 10 nm below the oxide/semiconductor interface and are located in the middle of the conduction channels for both the p-channel and n-channel transistors. It is apparent that random dopant-induced fluctuations can significantly impinge on the yield and reliability of SRAM circuits and constitute a fundamental limit for further scaling unless these devices are properly optimized.