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The demand for high-voltage and high-power power electronics devices, especially for the next generation electrical ship system, has increased rapidly these years. The three-phase three-level neutral point clamped (NPC) rectifier attracts more and more engineers' attention due to it has many advantages: sinusoidal input current which contains low harmonics, unity power factor, bidirectional power flow, low voltage and switching loss for each switch and so on. It could potentially provide DC power to medium voltage DC distribution system on ships. A NPC rectifier system is introduced in this thesis and the hardware test bed for validating is built successfully. Base on the topology of NPC rectifier, the PWM math model in ABC stationary frame is set up first. In order to obtain constant control variables as in DC motor control, the NPC rectifier PWM math model in DQ0 reference frame is built. And then for design the control loop, the NPC rectifier average models are developed in both ABC stationary frame and DQ0 reference frame. Three-level SVM is used for achieving sinusoidal input current, lower current THD and lower switching loss. Neutral point voltage balance problem is an inherent problem of three-level PWM rectifier. Without neutral point voltage control, the harmonic components of input current will greatly increase, and the DC-link capacitors and the switching devices may probably be destroyed. The influences of every switching state on neutral-point are analyzed and the small-vector is actively utilized to solve the neutral point balance problem. When to design the PI controller gains, the classic Nichols and Ziegler rules and the NPC system responses to this tuning algorithm are showed firstly. Further optimization for the system PI controller gains, which base on Particle Swarm Optimization (PSO), is used and the system responses are compared to the classic Nichols and Ziegler rules'. Hardware data validate the improvement of PSO contributes to the NPC system. A NPC rectifier real-time Controller-hardware-in-the-loop (CHIL) test is completed before the real hardware experiment since it could de-risk the controller for hardware experiment. The real-time simulation is compared to the hardware experiment, the CHIL methodology is approved.