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Impedance Measurement Techniques in Noisy Medium Voltage Power Hardware-in-the-Loop Environments

Title: Impedance Measurement Techniques in Noisy Medium Voltage Power Hardware-in-the-Loop Environments.
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Name(s): Chauncey, Gunnar Luke, author
Li, Hui, 1970-, professor directing thesis
Steurer, Michael, committee member
Yu, Ming, (Professor of scientific computing), committee member
Florida State University, degree granting institution
College of Engineering, degree granting college
Department of Electrical and Computer Engineering, degree granting department
Type of Resource: text
Genre: Text
Master Thesis
Issuance: monographic
Date Issued: 2018
Publisher: Florida State University
Place of Publication: Tallahassee, Florida
Physical Form: computer
online resource
Extent: 1 online resource (129 pages)
Language(s): English
Abstract/Description: In Power Hardware-In-The-Loop (PHIL) simulations, it is important to understand the impedance characteristics of the system being tested. These impedances are used in the assessment of both the stability and the accuracy of the PHIL simulation experiment, as well as for stability analyses for the integration of the device under test (DUT) into the eventual system of deployment. When testing medium voltage systems in the megawatt power range, sensor noise stemming from the switching amplifiers can become quite an issue. This thesis evaluates four different impedance measurement techniques to find a reliable, accurate, and quick assessment over a wide frequency range in the noisy environments of medium voltage systems. (1) a single tone consisting of one sine wave at a single frequency, (2) a multitoned signal which is the sum of multiple sine waves, each at a unique frequency, (3) a frequency-swept sine wave, also known as a “chirp”, and (4) a pseudorandom binary sequence. Each of these signals are injected into the system while energized in order to measure the response, which is then processed for the impedance characteristics. Various tests are conducted to simulated systems with simulated sensor noise to determine the viability of each of the techniques. Once the techniques are determined to be appropriate signals for system characterization in noisy medium voltage systems, they will be applied to a simulated Multilevel Modular Converter (MMC) model. The data from the simulated model will then be verified with a hardware experimental verification test with the viable signals chosen.
Identifier: 2018_Su_Chauncey_fsu_0071N_14782 (IID)
Submitted Note: A Thesis submitted to the Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science.
Degree Awarded: Summer Semester 2018.
Date of Defense: July 12, 2018.
Bibliography Note: Includes bibliographical references.
Advisory Committee: Hui Li, Professor Directing Thesis; Michael Steurer, Committee Member; Ming Yu, Committee Member.
Subject(s): Electrical engineering
Persistent Link to This Record: http://purl.flvc.org/fsu/fd/2018_Su_Chauncey_fsu_0071N_14782
Owner Institution: FSU

Choose the citation style.
Chauncey, G. L. (2018). Impedance Measurement Techniques in Noisy Medium Voltage Power Hardware-in-the-Loop Environments. Retrieved from http://purl.flvc.org/fsu/fd/2018_Su_Chauncey_fsu_0071N_14782