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Implementation of Chirp-z Discrete Fourier Transform on Virtex II FPGA

Title: Implementation of Chirp-z Discrete Fourier Transform on Virtex II FPGA.
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Name(s): Natarajan, Hariharan, author
Department of Electrical and Computer Engineering, degree granting department
Florida State University, degree granting institution
Type of Resource: text
Genre: Text
Issuance: monographic
Date Issued: 2004
Publisher: Florida State University
Place of Publication: Tallahassee, Florida
Physical Form: computer
online resource
Extent: 1 online resource
Language(s): English
Abstract/Description: The application of Fourier results in conversion in representation of a signal in time domain to frequency domain. Hence, it forms an important tool for frequency analysis. With advent of digital computers, we can perform frequency analysis faster and more efficiently. Thus discrete Fourier transform is important for frequency analysis of signal in discrete form. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT) algorithms have been invented in several variations. This thesis focuses on implementation of the Bluestein Chirp-z transform algorithm. This method uses chirp signals, which are complex exponential signals, which increase linearly with time. Hence, the name chirp-z Transform. The transform is implemented on Xilinx Inc.'s Virtex II FPGA. Virtex II family has two of the world's largest programmable device with gate count up to 8 million. It's features like embedded multiplier and memory make it ideal for digital signal processing applications. The implementation of chirp-z transform would involve designing a ROM to store the twiddle factors; a complex number multiplier and FIR filter for convolution. Again, we look at various algorithms for calculation of filter coefficient for minimum cost of adder and multiplier. DFT are implemented for length 4 point, 16 point, 32 point and 64 point. We analyze each of the above-mentioned implementations and especially the space occupied and the speed of the device.
Identifier: FSU_migr_etd-2725 (IID)
Submitted Note: A Thesis submitted to the Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science.
Degree Awarded: Spring Semester, 2004.
Date of Defense: April 9, 2004.
Keywords: DFT, Virtex II
Bibliography Note: Includes bibliographical references.
Subject(s): Electrical engineering
Computer engineering
Persistent Link to This Record: http://purl.flvc.org/fsu/fd/FSU_migr_etd-2725
Owner Institution: FSU

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Natarajan, H. (2004). Implementation of Chirp-z Discrete Fourier Transform on Virtex II FPGA. Retrieved from http://purl.flvc.org/fsu/fd/FSU_migr_etd-2725